This invention relates to a parallel analog-to-digital converter (commonly referred to as a flash A/D converter), more particularly to the comparator circuits of a flash A/D converter of the complimentary metal-oxide-semiconductor (CMOS) type.
A flash A/D converter converts an analog input signal to a digital output value by simultaneousIy comparing the input signal with a plurality of reference voltages, using a plurality of comparators. Because of their high speed, flash A/D converters are widely employed in video and radar equipment and laboratory instruments. CMOS flash A/D converters offer the additional advantages of compact size and low power dissipation, enabling the A/D converter to be fabricated as a monolithic integrated circuit.
A problem with existing CMOS flash A/D converters is that when the input signal is near one of the reference voltages, the output of the corresponding comparator tends to oscillate between the logic zero and one levels. This causes an instability of one least significant bit (LSB) in the output of the A/D converter; when the analog input signal is near the transition point between two adjacent digital values, the digital output signal tends to oscillate between those values. If the digital output signal is used to drive a display device, the result is an annoying flicker effect.